Incompatibility between new and existing products is a major problem in many technical disciplines, including networking and signal switching. Often new products are developed having increased performance and speed but customers have invested heavily in legacy products.
Incompatibility is a particular problem with network devices, such as routers and switches. Generally a router includes a chassis which can be rack mounted, has different types of slots into which cards and modules slide, and also contains basic components such as power supply(s) and fan(s). The modules inserted into the slots may be line cards, which are the actual printed circuit boards that handle packet data and analog signaling ingress and egress, or other types of modules.
One type of incompatibility with legacy peripheral devices occurs when the peripheral device absorbs writes at a much slower rate than the rate at which the CPU issues writes. This problem is somewhat alleviated by posted writes where the bus system provides buffers for data written by the CPU. For example, the PCI bus implements write posting in buffers located on P2P (PCI to PCI) bridges which connect PCI bus segments.
However, when the CPU rate of writing data greatly exceeds the capacity of a legacy peripheral device to accept data the write posting buffers themselves may reach their capacity and backpressure can result in system-wide problems. These problems can be difficult to detect and control when the CPU and other devices are integrated on a system-on-a-chip (SOC).
An ad hoc solution is to modify the device driver for slow legacy peripheral devices to insert wait states to match the CPU data write rate to the legacy device. However, for systems designers this solution is not viable since customers must be free to attach new devices to the network device.
The challenges in the field of providing compatibility with legacy devices continue to increase with demands for more and better techniques having greater flexibility and adaptability. Therefore, a need has arisen for a new system and method for writing to slow legacy devices.
In accordance with the present invention, a system and method for writing data to slow legacy devices without causing buffer overflow is provided that addresses disadvantages and problems associated with previously developed systems and methods.